APA

Mariantoni, M. (2013). The Quantum von Neumann Architecture and the Future of Quantum Computing with Superconducting Circuits. Perimeter Institute. https://pirsa.org/13040135

MLA

Mariantoni, Matteo. The Quantum von Neumann Architecture and the Future of Quantum Computing with Superconducting Circuits. Perimeter Institute, Apr. 25, 2013, https://pirsa.org/13040135

BibTex

@misc{ pirsa_PIRSA:13040135,
  doi = {10.48660/13040135},
  url = {https://pirsa.org/13040135},
  author = {Mariantoni, Matteo},
  keywords = {},
  language = {en},
  title = {The Quantum von Neumann Architecture and the Future of Quantum Computing with Superconducting Circuits},
  publisher = {Perimeter Institute},
  year = {2013},
  month = {apr},
  note = {PIRSA:13040135 see, \url{https://pirsa.org}}
}
            

Abstract

Superconducting quantum circuits have made significant advances over the past decade, allowing more complex and integrated circuits that perform with good fidelity. We have recently implemented a machine comprising seven quantum channels, with three superconducting resonators, two phase qubits, and two zeroing registers. I will explain the design and operation of this machine, first showing how a single microwave photon |1> can be prepared in one resonator and coherently transferred between the three resonators [1]. I will then demonstrate how this machine can be used as the quantum-mechanical analog of the von Neumann computer architecture, which for a classical computer comprises a central processing unit and a memory holding both instructions and data. The quantum version comprises a quantum central processing unit (quCPU) that exchanges data with a quantum random-access memory (quRAM) integrated on one chip, with instructions stored on a classical computer [2]. Finally, I will demonstrate that the quantum von Neumann machine provides one unit cell of a two-dimensional qubit-resonator array that can be used for surface code quantum computing. This will allow the realization of a scalable, fault-tolerant quantum processor with the most forgiving error rates to date [3].
[1] M. Mariantoni et al., Nature Physics 7, 287-293 (2011)
[2] M. Mariantoni et al., Science 334, 61-65 (2011)
[3] A. G. Fowler, M. Mariantoni, J. M. Martinis, and A. N. Cleland, Phys. Rev. A 86, 032324 (2012)